The integrated circuit TDA /D is designed for driving, controlling and protecting the switching transistor in .. This datasheet has been download from. Part, TDA Category. Description, Switch-mode Power Supply Controller. Company, ST Microelectronics, Inc. Datasheet, Download TDA datasheet. The TDA is a monolithic integrated circuit desi-gned to regulate and 1/8. This datasheet has been downloaded from at this page.

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download online TDA SMPS (Switch Mode Power Supply) control circuit in a 9 pin SIL package by chancromaslodis.mlad Siemens TDA chancromaslodis.mlt. TDA SWITCH-MODE POWER SUPPLY CONTROLLER Components datasheet pdf data sheet FREE TDA Datasheet Preview . PDF Download. TDA SIL9. TDA SIL9 · SIEMENS TV pulse source W the availability change. Watch. Product description; Product parameters; Download ( 1).

The turn-off operation is rapid because of the positive feedback caused by winding W3 in developing signal V5. As indicated before, winding W3 provides pulse drive signal V5 that controls also transistor Q1. The conduction interval in each cycle of transistors Q1 and Q2 remains substantially constant or unaffected by loading. Therefore, advantageously, the stored energy in transformer T1, when transistor Q1 becomes nonconductive, is substantially constant for a given level of voltage VUR.

However, the conduction interval may vary when a variation in voltage VUR occurs. When transistor Q2 ceases to conduct, a downramping current i4 of FIG. Current i4 causes diode D3 of FIG. During interval t1 -t4, control voltage V4 of FIG. Voltage V4 determines the length of interval t1 -t4 of FIG. When, at time t4 of FIG.

Therefore, positive current i5 of FIG. As explained before, when current i5 is positive, it causes transistors Q1 and Q2 to be conductive. During the aforementioned nonconduction interval t1 -t4 of FIG. Consequently, a current in the opposite polarity, as shown in FIGS. The resulting charge in capacitor C2 of FIG. Control circuit of FIG.

A transistor Q4 of circuit is coupled in a common base amplifier configuration. Resistor R51 is used for adjusting the level of the current in transistor Q4. Thus, an adjustable preset portion of current i8 flows to the cold ground conductor through resistor R5 and an error component of current i8 flows through the emitter of transistor Q4.

The collector current of transistor Q4 is coupled to the base of a transistor Q3 for controlling a collector current of transistor Q3. The collector of transistor Q3 forming a high output impedance is coupled to the junction between capacitor C4 and diode D3. When transistor Q2 becomes nonconductive the stored energy in transformer T2 causes current i4 to flow via diode D3 into capacitor C4, as indicated before.

Regulation of the power supply is obtained by controlling control voltage V4. Voltage V4 is controlled by controlling the loading across winding W2 of transformer T2 by means of transistor Q3. The collector current of transistor Q3 that forms a current source having a high output impedance is coupled to capacitor C4 that operates as a flywheel. In steady state, the amount of charge that is added to capacitor C4 during interval t1 -t4 of FIG.

Therefore, voltage V4 of FIG. Therefore, a longer time is required in each period for removing the stored inductive energy from transformer T2 of blocking oscillator , after transistor Q2 becomes nonconductive. The result is that the duty cycle, that is the ratio between the "on" time to the "off" time of transistor Q1 decreases, as required for proper regulation.

In steady state, voltage V4 is stabilized at a level that causes an equilibrium between the charging and discharging currents of capacitor C4. The result is that voltage V4 of FIG. Thus, regulation is obtained in a negative feedback manner. In the extreme case, a short circuit across winding W2 could inhibit oscillation in oscillator thus providing, advantageously, an inherent fail safe feature, as described later on. Another way by which an arrangement similar to control circuit is used for regulation purposes is shown and explained in a copending U.

There, a voltage that is produced similarly to voltage V4 of FIG. The transformer coupled voltage varies a sawtooth signal that is used for producing a pulse-width modulated control signal. A zener diode D4 is coupled in series with a resistor RD4, between the base and collector electrodes of transistor Q3.

Zener diode D4, advantageously, limits voltage V4 to about 39 volts.

Zener diode D4 limits the frequency of oscillator , or the minimum cut-off time of transistors Q2 and Q1. In this way, the maximum power transferred to the load is, advantageously, limited for providing over-current protection. For safe operation, it may be desirable to have secondary current i3 in winding Ws decay to zero before transistor Q1 is turned on again.

This means that the decay time of current i3 should be, preferably, shorter than that of current i4 of blocking oscillator This condition can be met by a proper choice of the primary inductance of transformer T2 and of zener diode D4.

Standby operation is initiated by operating SMPS in a low power operation mode. The low power operation mode occurs when the power demand from the SMPS drops below watts.

For example, within horizontal deflection circuit a horizontal oscillator, not shown, that is controlled by a remote control unit ceases operating during standby. Therefore, transistor Q3 saturates, causing a near short circuit across winding W2 of transformer T2 that causes voltage V4 to be approximately zero throughout the standby mode of operation.

Consequently, unlike in the run-mode of operation, a positive pulse of signal V5 cannot be generated by resonance oscillations in transformer T2. It follows that the regenerative feedback loop is prevented from initiating the turn on transistor Q2.

Consequently, continuous oscillation cannot be sustained. In accordance with an aspect of the invention, transistor Q2 is periodically triggered into switching in a burst mode operation by an upramping portion of a half wave rectified voltage of a signal V7.

TDA4601 SMPS control circuit - Siemens

Signal V7 occurs at the mains frequency, such as 50 Hz. Signal V7 is derived from bridge rectifier and is applied to the base of transistor Q2 via a series arrangement of a resistor R1 and a capacitor C1. The series arrangement operates as a differentiator that produces a current i7. A parallel arrangement of a capacitor C3 of FIG.

A diode D1 is coupled in parallel with capacitor C2. During normal run mode operation, capacitor C3 remains charged to a constant voltage V6 by the positive voltage pulses of signal V5 that is developed in winding W3 each time transistor Q2 is conductive.

Therefore, capacitor C3 is decoupled from the positive feedback signal path and has no effect on circuit operation.

During standby operation, capacitor C3 discharges during the long inactive periods or dead time, as shown by voltage V6 between times t12 -t13 in FIG. Immediately after time t10 of FIG. As a result, a base current, produced in transistor Q2, causes transistor Q2 to be conductive. When transistor Q2 becomes conductive, a positive pulse of signal V5 is produced in winding W3 that maintains transistors Q1 and Q2 conductive.

Similarly to normal run mode operation that was described before, transistor Q2 remains conductive until the magnitude of the base current of transistor Q2 is insufficient to maintain transistor Q2 in saturation, as collector current i2 is upramping. Then, collector voltage V2 increases and signal V5 decreases. The result is that by means of positive feedback transistor Q2 is turned-off. The voltage across capacitor C2 produces negative current i5 that discharges capacitor C2 via a diode D7 and that maintains transistor Q2 in cut-off.

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As long as a magnitude of negative current i5 is larger than that of positive current i7, the base current in transistor Q2 is zero and transistor Q2 remains nonconductive.

When the magnitude of negative current i5 of FIG. During a substantial portion of a given conduction interval of transistor Q2, current i5 flows entirely via capacitor C2 to form the base current of transistor Q2.

Because collector current i2 is upramping, the emitter voltage of transistor Q2 increases in an upramping manner, causing the voltage at the anode of diode D2 to increase.

When the voltage at the anode of diode D2 becomes sufficiently positive, diode D2 begins conducting.

Therefore, a substantial portion of current i5 is diverted by capacitor C3 from the base of transistor Q2. The result is that the base current becomes insufficient to sustain the collector current of transistor Q2.

Therefore, the positive feedback signal path causes transistor Q2 to turn-off. Thus, the peak amplitude of current i2 is determined by the level of voltage V6 across capacitor C3.

During interval t10 -t12 of FIGS. Therefore, voltage V6 of FIG. In accordance with a further aspect of the invention, voltage V6 that becomes progressively larger causes the conduction interval during each cycle that occurs in interval t10 -t12 of FIGS.

Consequently, the peak amplitudes and the pulse widths of currents i1 and i2 of FIG. During a corresponding nonconduction portion of each cycle that occurs in interval t10 -t12 of FIGS. The length of the nonconduction interval of transistor Q2 in each cycle is determined by the time required for discharging capacitor C2 to such a level that causes a magnitude of negative current i5 to be smaller than that of positive current i7.

In accordance with a feature of the invention, that nonconduction interval becomes progressively longer because capacitor C2 is charged to a progressively higher voltage and also because the magnitude of current i7 becomes progressively smaller.

Therefore, positive base current will begin flowing in the base of transistor Q2 after progressively longer nonconduction intervals. The result is that the switching frequency during the burst mode interval will vary or decrease progressively. At time t12 of FIG. Therefore, burst mode operation that occurred during interval t10 -t12 cannot continue and the long dead time interval t12 -t13 occurs in which no switching operation happens. At time t13, positive current i7 is generated again and a subsequent burst mode switching interval occurs in transistors Q1 and Q2.

During the burst mode interval t10 -t12 of FIG. Such operation may be referred to by the term soft start operation. Because of the soft start operation, capacitors, for example, of SMPS are charged or discharged in a gradual manner. In accordance with another feature of the invention, volta V6 of capacitor C3 by being lower than during run mode operation maintains the switching frequency of transistors Q1 and Q2 of FIG.

As a result of the soft start operation during standby and of the high switching frequency during standby, noise produced by parasitic mechanical vibrations in inductors and transformers of SMPS of FIG. The burst mode operation during interval t10 -t12 of FIG.

Because of the burst mode operation, the energy consumed in SMPS is maintained substantially lower or about 6 watts than during normal run mode operation.

ta8445k datasheet pdf ibm

Build-Up of Internal Reference Voltage The internal reference voltage supplies the voltage regulator and effects charging of the coupling electrolytic capacitor connected to the switching transistor. Enabling of Control Logic In conjunction with the generation of the reference voltage, the current supply for the control logic is activated by means of an additional stabilization circuit.

The integrated circuit is then ready for operation. The start-up phase above described are necessary for ensuring the charging of the coupling electrolytic capacitor, which in turn supplies the switching transistor. Only then is it possible to ensure that the transistor switches accurately. Pin 3 control input, overload and standby identification receives the rectified amplitude fluctuations of the feedback coil.

The control amplifier operates with an input voltage of approx. Depending on the internal voltage reference, the overload identification limits inconjunction with collector current simulator pin 4 the operating range of the control amplifier.

TDA4601 Datasheet (PDF) - Siemens Semiconductor Group

The collector current is simulated by an external RC-combination present at pin 4 and internally set threshold voltages.

The largest possible collector current applicable to the switching transistor point of return increases in proportion to the increased capacitance 10 nF. Thus the required operating range of the control amplifier is established.

The range of control lies between a DC-voltage clamped at 2 V and a sawtooth - shaped rising ACvoltage, which can vary up to a max. During secondary load reduction to approx. During additional secondary load decreases to approx.

Semiconductor Group TDA The output levels of the control amplifier as well as those of the overload identification and collector current simulator are compared in the trigger and forwarded to the control logic. Via pin 5 it is possible to externally inhibit the operations of the IC. The output at pin V REF pin 8 will be inhibited when voltages of 0.

The base current amplifier forwards the sawtoothspahed V4 voltage to the output of pin 8.The result is that each of the conduction intervals is of a sufficient length. During, for example, interval tO -t1 of FIG. Also some files are djvu so you need djvu viewer to open them.

Consequently, continuous oscillation cannot be sustained. This protective measure is enabled if the supply voltage at pin 9 reaches a value 6.

The series arrangement operates as a differentiator that produces a current i7. Start-up is not as smooth as with an immediately available supply voltage, because TDA has to be supplied by the start-up circuit until the entire secondary load has been charged. During standby operation, capacitor C3 discharges during the long inactive periods or dead time, as shown by voltage V6 between times t12 -t13 in FIG.